cm0002@lemmings.world · 2 days agoBolt Graphics unveils Zeus GPU built on RISC-V and path tracing techplus-squarewww.theregister.comexternal-linkmessage-square0linkfedilinkarrow-up15arrow-down10
arrow-up15arrow-down1external-linkBolt Graphics unveils Zeus GPU built on RISC-V and path tracing techplus-squarewww.theregister.comcm0002@lemmings.world · 2 days agomessage-square0linkfedilink
cm0002@lemmings.world · 2 days agoEasy RISC-Vplus-squaredramforever.github.ioexternal-linkmessage-square0linkfedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkEasy RISC-Vplus-squaredramforever.github.iocm0002@lemmings.world · 2 days agomessage-square0linkfedilink
Scoopta@programming.dev · 3 days agoRISC-V CPUs with H extension?plus-squaremessage-squaremessage-square2linkfedilinkarrow-up15arrow-down10
arrow-up15arrow-down1message-squareRISC-V CPUs with H extension?plus-squareScoopta@programming.dev · 3 days agomessage-square2linkfedilink
cm0002@lemmings.world · 2 days agoRISC-V takes first step toward international standardization as ISO/IEC JTC1 grants PAS Submitter statusplus-squareriscv.orgexternal-linkmessage-square0linkfedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkRISC-V takes first step toward international standardization as ISO/IEC JTC1 grants PAS Submitter statusplus-squareriscv.orgcm0002@lemmings.world · 2 days agomessage-square0linkfedilink
cm0002@lemmings.world · 12 days agoRISC-V SBI and the full boot processplus-squarepopovicu.comexternal-linkmessage-square0linkfedilinkarrow-up12arrow-down10
arrow-up12arrow-down1external-linkRISC-V SBI and the full boot processplus-squarepopovicu.comcm0002@lemmings.world · 12 days agomessage-square0linkfedilink
cm0002@lemmy.zip · 13 days agoUpbeat and SiFive Launch Ultra-Low Power RISC-V MCU with AI Accelerationplus-squarelinuxgizmos.comexternal-linkmessage-square0linkfedilinkarrow-up19arrow-down10
arrow-up19arrow-down1external-linkUpbeat and SiFive Launch Ultra-Low Power RISC-V MCU with AI Accelerationplus-squarelinuxgizmos.comcm0002@lemmy.zip · 13 days agomessage-square0linkfedilink
cm0002@lemdro.idMEnglish · 15 days agoRunning Steam on RiSC-Vplus-squarewww.youtube.comexternal-linkmessage-square0linkfedilinkarrow-up13arrow-down10
arrow-up13arrow-down1external-linkRunning Steam on RiSC-Vplus-squarewww.youtube.comcm0002@lemdro.idMEnglish · 15 days agomessage-square0linkfedilink
cm0002@lemdro.idMEnglish · 15 days agoImagination PowerVR Mesa Vulkan Driver Enables Unofficial Support For More GPUsplus-squarewww.phoronix.comexternal-linkmessage-square0linkfedilinkarrow-up16arrow-down11
arrow-up15arrow-down1external-linkImagination PowerVR Mesa Vulkan Driver Enables Unofficial Support For More GPUsplus-squarewww.phoronix.comcm0002@lemdro.idMEnglish · 15 days agomessage-square0linkfedilink
cm0002@lemdro.idMEnglish · edit-215 days agoThe Milk-V Jupiter Experience (and some RISC-V Gaming)plus-squareodysee.comexternal-linkmessage-square0linkfedilinkarrow-up14arrow-down11
arrow-up13arrow-down1external-linkThe Milk-V Jupiter Experience (and some RISC-V Gaming)plus-squareodysee.comcm0002@lemdro.idMEnglish · edit-215 days agomessage-square0linkfedilink
cm0002@lemdro.idMEnglish · 15 days agoMIPS I8500 Processor Orchestrates Data Movement for the AI Eraplus-squaremips.comexternal-linkmessage-square0linkfedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkMIPS I8500 Processor Orchestrates Data Movement for the AI Eraplus-squaremips.comcm0002@lemdro.idMEnglish · 15 days agomessage-square0linkfedilink
cm0002@lemmy.zip · 17 days agoForlinx OK153-S SBC Combines Cortex-A7 and RISC-V Cores for Real-Time I/O Interfacesplus-squarelinuxgizmos.comexternal-linkmessage-square0linkfedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkForlinx OK153-S SBC Combines Cortex-A7 and RISC-V Cores for Real-Time I/O Interfacesplus-squarelinuxgizmos.comcm0002@lemmy.zip · 17 days agomessage-square0linkfedilink
cm0002@lemmy.zip · 21 days agoRISC-V set to announce 25% market penetration — open-standard ISA is ahead of schedule, securing fast-growing silicon footprintplus-squarewww.tomshardware.comexternal-linkmessage-square6linkfedilinkarrow-up118arrow-down10
arrow-up118arrow-down1external-linkRISC-V set to announce 25% market penetration — open-standard ISA is ahead of schedule, securing fast-growing silicon footprintplus-squarewww.tomshardware.comcm0002@lemmy.zip · 21 days agomessage-square6linkfedilink
cm0002@programming.devM · 24 days agoLinux 6.18 RISC-V Default Kernel Builds To Support Front Panel Shutdown/Reboot Buttonsplus-squarewww.phoronix.comexternal-linkmessage-square0linkfedilinkarrow-up13arrow-down10
arrow-up13arrow-down1external-linkLinux 6.18 RISC-V Default Kernel Builds To Support Front Panel Shutdown/Reboot Buttonsplus-squarewww.phoronix.comcm0002@programming.devM · 24 days agomessage-square0linkfedilink
cm0002@piefed.worldEnglish · 1 month agoLinus Torvalds Lashes Out At RISC-V Big Endian Plansplus-squarewww.phoronix.comexternal-linkmessage-square9linkfedilinkarrow-up113arrow-down11
arrow-up112arrow-down1external-linkLinus Torvalds Lashes Out At RISC-V Big Endian Plansplus-squarewww.phoronix.comcm0002@piefed.worldEnglish · 1 month agomessage-square9linkfedilink
cm0002@piefed.socialEnglish · 1 month agoA RISC-V based accelerator for Post Quantum Cryptography – RISC-V International riscv.orgexternal-linkmessage-square0linkfedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-linkA RISC-V based accelerator for Post Quantum Cryptography – RISC-V International riscv.orgcm0002@piefed.socialEnglish · 1 month agomessage-square0linkfedilink
cm0002@piefed.worldEnglish · 1 month agoRISC-V With Linux 6.18 Brings Support For MIPS Vendor Extensionsplus-squarewww.phoronix.comexternal-linkmessage-square0linkfedilinkarrow-up13arrow-down10
arrow-up13arrow-down1external-linkRISC-V With Linux 6.18 Brings Support For MIPS Vendor Extensionsplus-squarewww.phoronix.comcm0002@piefed.worldEnglish · 1 month agomessage-square0linkfedilink
cm0002@lemmy.worldM · 1 month agoTenstorrent Productizes RISC-V CPU And AI IPplus-squarewww.eetimes.comexternal-linkmessage-square0linkfedilinkarrow-up11arrow-down10
arrow-up11arrow-down1external-linkTenstorrent Productizes RISC-V CPU And AI IPplus-squarewww.eetimes.comcm0002@lemmy.worldM · 1 month agomessage-square0linkfedilink
cm0002@lemmy.worldM · 1 month ago22nm RISC-V AI Chip Targets Wearables and IoT - Embeddedplus-squarewww.embedded.comexternal-linkmessage-square0linkfedilinkarrow-up14arrow-down10
arrow-up14arrow-down1external-link22nm RISC-V AI Chip Targets Wearables and IoT - Embeddedplus-squarewww.embedded.comcm0002@lemmy.worldM · 1 month agomessage-square0linkfedilink
